Main memory (DRAM) consumes an increasing fraction of the total system power in a computer system, thanks to significant energy efficiency improvements in computation logic and the escalating demand for memory in modern workloads. As DRAM energy consumption grows, greater effort is required on the part of computer architects to develop more energy-efficient DRAM architectures. Unfortunately, a major obstacle towards further research is the relative lack of information available on the detailed energy consumption behavior of DRAM. DRAM researchers have long relied on IDD values, which are a set of standardized current measurements provided by DRAM vendors for each of their models, to determine how and when DRAM consumes energy.
We find that the IDD values do not provide insight into several important factors that affect DRAM energy consumption. To bridge this gap in knowledge, we perform a detailed experimental characterization of the energy consumed by modern real-world DRAM modules. Our characterization of 50 DDR3L DRAM modules, comprised of 200 DRAM chips, yields several new observations that were not previ- ously captured by the IDD specifications. Notably, we find that (1) real-world energy consumption often differs significantly from the IDD specification; (2) DRAM energy consumption is strongly correlated with the data values being read or written; and (3) the architecture of the DRAM chip leads to systematic structural variation in DRAM, where the same banks and rows across multiple DRAM modules from the same model consume more energy than other banks or rows. We also study how DRAM energy consumption has changed over process technology generations, and study the impact of temperature on energy consumption.
We use the insights gained from our characterization to perform two studies on the potential of mechanisms that exploit the data dependence and structural variation. One of our studies on energy-aware data encoding shows that we can potentially reduce DRAM energy consumption by 12.2%, averaged across a wide range of workloads. Ultimately, we hope that the findings in this paper will inspire new research directions in energy-aware DRAM design.
Our paper will be published in SIGMETRICS 2018.